currently in the program counter register as its source and the instruction register as its destination. The control unit uses a fetch to load each instruction of a program from memory into the
instruction register, where that instruction is decoded before being executed; and while that instruction is being decoded, the processor places the address
of the next instruction into the program counter by incrementing the address
that’s currently in the program counter, so that the newly incremented address
points to the next instruction the sequence. In the case of our DLW-1, the
program counter is incremented by two every time an instruction is fetched,
because the two-byte instructions begin at every other byte in memory.
Running a Simple Program: The Fetch-Execute Loop
In Chapter 1 we discussed the steps a processor takes to perform calculations
on numbers using the ALU in combination with a fetched arithmetic instruc-
tion. Now let’s look at the steps the processor takes in order to fetch a series of instructions—a program—and feed them to either the ALU (in the case of
arithmetic instructions) or the memory access hardware (in the case of loads
and stores):
1.
Fetch the next instruction from the address stored in the program counter, and load that instruction into the instruction register. Increment the
program counter.
2.
Decode the instruction in the instruction register.
3.
Execute the instruction in the instruction register, using the following rules:
a.
If the instruction is an arithmetic instruction, execute it using the
ALU and register file.
b.
If the instruction is a memory access instruction, execute it using
the memory-access hardware.
These three steps are fairly straightforward, and with one modification
they describe the way that microprocessors execute programs (as we’ll see
in the section “Branch Instructions” on page 30). Computer scientists often 28
Chapter 2
refer to these steps as the fetch-execute loop or the fetch-execute cycle . The fetch-execute loop is repeated for as long as the computer is powered on. The
machine iterates through the entire loop, from step 1 to step 3, over and over
again many millions or billions of times per second in order to run
programs.
Let’s run through the three steps with our example program as shown
in Figure 2-9. (This example presumes that #500 is already in the program
counter.) Here’s what the processor does, in order:
1.
Fetch the instruction beginning at #500, and load load #12, A into the
instruction register. Increment the program counter to #502.
2.
Decode load #12, A in the instruction register.
3.
Execute load #12, A from the instruction register, using the memory-
access hardware.
4.
Fetch the instruction beginning at #502, and load load #13, B in the
instruction register. Increment the program counter to #504.
5.
Decode load #13, B in the instruction register.
6.
Execute load #13, B from the instruction register, using the memory-
access hardware.
7.
Fetch the instruction beginning at #504, and load add A, B, C into the
instruction register. Increment the program counter to #506.
8.
Decode add A, B, C in the instruction register.
9.
Execute add A, B, C from the instruction register, using the ALU and
register file.
10. Fetch the instruction at #506, and load store C, #14 in the instruction
register. Increment the program counter to #508.
11. Decode store C, #14 in the instruction register.
12. Execute store C, #14 from the instruction register, using the memory-
access hardware.
NOTE
To zoom in on the execute steps of the preceding sequence, revisit Chapter 1, and particularly the sect ions“Refining the File-Clerk Model” on page 6 and “RAM: When
Registers Alone Won’t Cut It” on page 8. If you do, you’ll gain a pretty good understanding of what’s involved in executing a program on any machine. Sure, there are important machine-specific variations for most of what